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Intel Software and System Validation Engineer in Phoenix, Arizona

Job Description

Our Software and System Validation Engineers are part of a vibrant cross-site team (US and Asia) who define validation strategies develop the tests that we use to validate IPs, subsystem and platform integration for Intel’s networking and server products across multiple roadmaps. We support a range of Data Accelerators redundancy and survivability features with our experienced pre and post-Si engineers.

An ideal candidate has general platform integration and debug expertise across a range of interfaces so they can pick up new technologies to architect define and develop test strategies and content that efficiently identifies issues at the RTL FW Integration or Specification level. You will work with virtual platform simulation FPGA Big box emulation and real hardware to ensure the devices meet our customers specifications and use cases. Successful System Validation Engineers have a broad understanding of system architecture, RTL, firmware, software and debug techniques while routinely interfacing with Architecture Design Software and Pre/Post Silicon Validation teams.


You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Minimum Qualifications

3+ years of total experience, inclusive of experience in:

  • Experience working/developing test plans

  • Experience in one or more of the following languages C, C#, C++, TCL, Perl and/or Python

  • Experience in pre-silicon development and/or debug or experience in software hardware system bring-up and/or silicon power-on

Preferred Qualifications

6+ years of experience in one or more of the following:

  • Experience developing kernel user mode drivers/applications in a Linux/VMware/UNIX environments

  • DMA compression/analytics and/or virtualization standards

  • Board topologies CPLD Power Management Units PHY understanding

  • Debugging or developing on hardware and emulation models Design and derive testing for system clock system reset flows Porting content across multiple OS like Linux VMware Microsoft Windows

  • PCIe protocol and/or PCIe interfaces testing experience

  • Lab equipment JTAG Logic Analyzers Oscilloscopes protocol analyzers

  • Experience with Agile process

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.